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| DM74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs August 1986 Revised April 2000 DM74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs General Description The DM74LS221 is a dual monostable multivibrator with Schmitt-trigger input. Each device has three inputs permitting the choice of either leading-edge or trailing-edge triggering. Pin (A) is an active-LOW trigger transition input and pin (B) is an active-HIGH transition Schmitt-trigger input that allows jitter free triggering for inputs with transition rates as slow as 1 volt/second. This provides the input with excellent noise immunity. Additionally an internal latching circuit at the input stage also provides a high immunity to VCC noise. The clear (CLR) input can terminate the output pulse at a predetermined time independent of the timing components. This (CLR) input also serves as a trigger input when it is pulsed with a low level pulse transition ( ). To obtain the best and trouble free operation from this device please read operating rules as well as the Fairchild Semiconductor one-shot application notes carefully and observe recommendations. Features s A dual, highly stable one-shot s Compensated for VCC and temperature variations s Pin-out identical to DM74LS123 (Note 1) s Output pulse width range from 30 ns to 70 seconds s Hysteresis provided at (B) input for added noise immunity s Direct reset terminates output pulse s Triggerable from CLEAR input s DTL, TTL compatible s Input clamp diodes Note 1: The pin-out is identical to DM74LS123 but, functionally it is not; refer to Operating Rules #10 in this datasheet. Ordering Code: Order Number DM74LS221M DM74LS221SJ DM74LS221N Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagram Function Table Inputs CLEAR L X X H H (Note 2) A X H X L L B X X L H H Q L L Outputs Q H H H = HIGH Logic Level L = LOW Logic Level X = Can Be Either LOW or HIGH = Positive Going Transition = Negative Going Transition = A Positive Pulse = A Negative Pulse L H Note 2: This mode of triggering requires first the B input be set from a LOW-to-HIGH level while the CLEAR input is maintained at logic LOW level. Then with the B input at logic HIGH level, the CLEAR input whose positive transition from LOW-to-HIGH will trigger an output pulse. (c) 2000 Fairchild Semiconductor Corporation DS006409 www.fairchildsemi.com DM74LS221 Dual Non-Retriggerable One-Shot Functional Description The basic output pulse width is determined by selection of an external resistor (RX) and capacitor (CX). Once triggered, the basic pulse width is independent of further input transitions and is a function of the timing components, or it may be reduced or terminated by use of the active low CLEAR input. Stable output pulse width ranging from 30 ns to 70 seconds is readily obtainable. Operating Rules 1. An external resistor (RX) and an external capacitor (CX) are required for proper operation. The value of CX may vary from 0 to approximately 1000 F. For small time constants high-grade mica, glass, polypropylene, polycarbonate, or polystyrene material capacitor may be used. For large time constants use tantalum or special aluminum capacitors. If timing capacitor has leakages approaching 100 nA or if stray capacitance from either terminal to ground is greater than 50 pF the timing equations may not represent the pulse width the device generates. When an electrolytic capacitor is used for CX a switching diode is often required for standard TTL one-shots to prevent high inverse leakage current. This switching diode is not needed for the DM74LS221 one-shot and should not be used. Furthermore, if a polarized timing capacitor is used on the DM74LS221, the positive side of the capacitor should be connected to the "CEXT" pin (Figure 1). 3. For CX >> 1000 pF, the output pulse width (tW) is defined as follows: tW = KRX CX where [RX is in k] [CX is in pF] [tW is in ns] K Ln2 = 0.70 4. The multiplicative factor K is plotted as a function of CX for design considerations: (See Figure 4). 8. Duty cycle is defined as tW/T x 100 in percentage, if it goes above 50% the output pulse width will become shorter. If the duty cycle varies between LOW and HIGH values, this causes output pulse width to vary, or jitter (a function of the REXT only). To reduce jitter, REXT should be as large as possible, for example, with REXT = 100k jitter is not appreciable until the duty cycle approaches 90%. 9. Under any operating condition CX and RX must be kept as close to the one-shot device pins as possible to minimize stray capacitance, to reduce noise pick-up, and to reduce I-R and Ldi/dt voltage developed along their connecting paths. If the lead length from CX to pins (6) and (7) or pins (14) and (15) is greater than 3 cm, for example, the output pulse width might be quite different from values predicted from the appropriate equations. A non-inductive and low capacitive path is necessary to ensure complete discharge of CX in each cycle of its operation so that the output pulse width will be accurate. 10. Although the DM74LS221's pin-out is identical to the DM74LS123 it should be remembered that they are not functionally identical. The DM74LS123 is a retriggerable device such that the output is dependent upon the input transitions when its output "Q" is at the "High" state. Furthermore, it is recommended for the DM74LS123 to externally ground the CEXT pin for improved system performance. However, this pin on the DM74LS221 is not an internal connection to the device ground. Hence, if substitution of an DM74LS221 onto an DM74LS123 design layout where the CEXT pin is wired to the ground, the device will not function. 11. VCC and ground wiring should conform to good highfrequency standards and practices so that switching transients on the VCC and ground return leads do not cause interaction between one-shots. A 0.01 F to 0.10 F bypass capacitor (disk ceramic or monolithic type) from VCC to ground is necessary on each device. Furthermore, the bypass capacitor should be located as close to the VCC-pin as space permits. 2. 5. For CX < 1000 pF see Figure 3 for tW vs. CX family curves with RX as a parameter. 6. 7. To obtain variable pulse widths by remote trimming, the following circuit is recommended: (See Figure 2). Output pulse width versus VCC and temperatures: Figure 5 depicts the relationship between pulse width variation versus VCC. Figure 6 depicts pulse width variation versus temperatures. www.fairchildsemi.com 2 DM74LS221 Dual Non-Retriggerable One-Shot Operating Rules (Continued) Note: "Rremote" should be as close to the one-shot as possible. FIGURE 1. FIGURE 2. FIGURE 3. FIGURE 4. FIGURE 5. FIGURE 6. Note: For further detailed device characteristics and output performance, please refer to the Fairchild Semiconductor one-shot application note AN-372. 3 www.fairchildsemi.com DM74LS221 Dual Non-Retriggerable One-Shot Absolute Maximum Ratings(Note 3) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0C to +70C -65C to +150C Note 3: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VT+ VT- VT+ VT- IOH IOL tW tREL Supply Voltage Positive-Going Input Threshold Voltage at the A Input (VCC = Min) Negative-Going Input Threshold Voltage at the A Input (VCC = Min) Positive-Going Input Threshold Voltage at the B Input (VCC = Min) Negative-Going Input Threshold Voltage at the B Input (VCC = Min) HIGH Level Output Current LOW Level Output Current Pulse Width (Note 4) Clear Release Time (Note 4) Rate of Rise or Fall of Schmitt Input (B) (Note 4) Rate of Rise or Fall of Logic Input (A) (Note 4) REXT CEXT DC TA External Timing Resistor (Note 4) External Timing Capacitance (Note 4) Duty Cycle (Note 4) Free Air Operating Temperature Note 4: TA = 25C and VCC = 5V. Parameter Min 4.75 Nom 5 1 Max 5.25 2 Units V V V 0.8 1 1 2 V V 0.8 0.9 -0.4 8 mA mA ns ns Data Clear 40 40 15 1 1 1.4 0 RT = 2 k RT = REXT (Max) 0 100 1000 50 60 70 k F % C www.fairchildsemi.com 4 DM74LS221 Dual Non-Retriggerable One-Shot Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage II IIH IIL Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current IOS ICC Short Circuit Output Current Supply Current Conditions VCC = Min, II = -18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max VIL = Max, VIH = Min VCC = Min, IOL = 4 mA VCC = Max, VI = 7V VCC = Max, VI = 2.7V VCC = Max VI = 0.4V VCC = Max (Note 6) VCC = Max Quiescent Triggered Note 5: All typicals are at VCC = 5V, TA = 25C. Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. Min Typ (Note 5) Max -1.5 Units V V 2.7 3.4 0.35 0.5 0.4 0.1 20 V mA A mA A1, A2 B Clear -20 4.7 19 -0.4 -0.8 -0.8 -100 11 27 mA mA Switching Characteristics at VCC = 5V and TA = 25C Symbol tPLH tPLH tPHL tPHL tPLH tPHL tW(out) Parameter Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Pulse Width Using Zero Timing Capacitance tW(out) Output Pulse Width Using External Timing Resistor A1, A2 to Q, Q From (Input) To (Output) A1, A2 to Q B to Q A1, A2 to Q B to Q Clear to Q Clear to Q A1, A2 to Q, Q CEXT = 0 REXT = 2 k RL = 2 k CL = 15 pF CEXT = 100 pF REXT = 10 k RL = 2 k CL = 15 pF CEXT = 1 F REXT = 10 k RL = 2 k CL = 15 pF CEXT = 80 pF REXT = 2 k RL = 2 k CL = 15 pF 70 150 ns 6 7.5 ms 600 750 ns 20 70 ns Conditions CEXT = 80 pF REXT = 2 k CL = 15 pF RL = 2 k Min Max 70 55 80 65 65 55 Units ns ns ns ns ns ns 5 www.fairchildsemi.com DM74LS221 Dual Non-Retriggerable One-Shot Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A www.fairchildsemi.com 6 DM74LS221 Dual Non-Retriggerable One-Shot Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 7 www.fairchildsemi.com DM74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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